1. Field of the Invention
The present invention relates to a multilayer chip capacitor, and more particularly, to a multilayer chip capacitor having an adjustable and high equivalent series resistance (ESR) and a low equivalent series inductance (ESL) and capable of effectively attaining flat impedance characteristics in a wide band frequency.
2. Description of the Related Art
A high-speed micro processing unit (MPU) is continuously increased in operating frequency and consumption current, and reduced in working voltage. Therefore, it has been harder to suppress noise of a supply direct current (DC) voltage resulting from a sudden change in the MPU consumption current within a certain range, which is generally 5˜10%. In order to eliminate voltage noise, a multilayer chip capacitor is widely used in a power distribution network as a decoupling capacitor. This multilayer chip capacitor supplies a current to a central processing unit (CPU) to suppress voltage noise when the MPU consumption current is suddenly changed.
Recently, with a further increase in an operation frequency of the MPU, the MPU has consumed a greater amount of current. This has led to a need for an increase in capacitance and equivalent series resistance (ESR) of the decoupling capacitor and a reduction in equivalent series inductance (ESL). This need has arisen to assure a power distribution network can have impedance maintained at a low and constant level in a broad band frequency range. Ultimately, this beneficially serves to suppress noise of the supply DC voltage resulting from a drastic change in the MPU consumption current.
In order to satisfy low ESL characteristics required for a decoupling capacitor for use in a MPU power distribution network, it has been suggested that the capacitor has outer electrodes changed in position or configuration, or inner electrodes changed in configuration, as disclosed in U.S. Pat. Nos. 5,880,925, 6,038,121, 6,266,228, and 6,407,904. These conventional technologies pertain to changing a current path inside the capacitor, that is, forming a short or multiple current loop to reduce an ESL. This ultimately leads to a decrease in ESL but entails a reduction in ESR. In the end, such a capacitor can lower impedance at a high frequency while failing to maintain the impedance of the power distribution network at a constant level due to a low ESR.
As a method for overcoming problems associated with too low ESR, outer electrodes or inner electrodes have been formed of an electrically high-resistant material to achieve high ESR characteristics. However, when high-resistant outer electrodes are employed, there arises a need to prevent localized heat spot caused by current concentration due to pinholes inside the outer electrodes. Moreover, the ESR can be hardly adjusted accurately. Also, when the inner electrodes are formed of a high resistant material, the material for the high-resistant inner electrodes needs to be matched with a ceramic material according to a change in the ceramic material due to a higher-capacity capacitor and accordingly should keep changing according to improvement or change of the ceramic material. This potentially increases the unit price for products.